As Emerging Technologies Outpace Semiconductor Processes, IBM Takes Leap Towards 7nm IC Fabrication

Traditional IC manufacturing methods can't keep up with industry demands for long. IBM researchers are looking to nanofabrication of ICs for the next generation of semiconductors.

IBM has developed several new materials that make selectively depositing materials on features as small as 15nm.

The methods involved are described in a paper published in Applied Materials & Interfaces by an IBM team headed up by Rudy Wojtecki. Traditional fabrication methods involving coating, patterning, and stripping can be bypassed through the use of what's called selective area atomic layer deposition or SA-ALD.

While the employment of selective deposition isn’t revolutionary, several new self-assembled monolayers (SAMs) developed at IBM now make it possible for selective deposition to be applied at a scale tiny enough to be relevant for building state-of-the-art semiconductors.

Selected Area Atomic Layer Deposition

The method described in the IBM paper involves selectively depositing material on areas as small as 15nm by growing a film on a selected area, as illustrated by the blue “Material 2” in the illustration below.

SA-ALD illustrated. Reprinted (adapted) with permission from ACS Appl. Mater. Interfaces 2018, 10(44), pp 38630-38637. Copyright (2018) American Chemical Society.

As Rudy tells it in an article he wrote for IBM, “Enabling fabrication beyond 7nm”, “With traditional methods of fabrication, this would require coating a substrate with resist, patterning the resist through an exposure step, developing the image, depositing an inorganic film and then stripping the resist to give you a patterned inorganic material. We found a way of depositing this inorganic film much more simply, using a self-aligned process.”

In the image above, the Material 1 areas are “blocked”, so atomic layer deposition only takes place in the center on Material 2.

The ALD film can serve as a target for the further building up of a chip, thus enabling self-alignment, especially critical on the tiny scale of 7nm. Imagine if a chip were like a street grid, with one layer being the streets, and another layer, perpendicular to the streets being the avenues.
Even if the methods of fabricating the streets and avenues were both satisfactory, if they don’t line up correctly with respect to each other, all is for naught. Self-alignment belays that risk.

This scanning electron micrograph shows selectively deposited film at different magnifications and includes an inset of pre-patterned tungsten with areas containing inhibitory molecules shown in blue. Image from IBM

In essence, these researchers are working towards the ability to reliably grow nanoscale components.

IBM’s New Self-Assembled Monolayers (SAMs)

IBM has gone beyond the off-the-shelf reagents and is developing new SAM components that make this development practicable. They are:

1. Octadecyl phosphoric acid
2. Urea-containing component
3. Aromatic component
4. Photoreactive diyne component

The SAM component that enables IBM’s new method. Reprinted (adapted) with permission from ACS Appl. Mater. Interfaces 2018, 10(44), pp 38630-38637. Copyright (2018) American Chemical Society.s

Moore’s Law Finally Overturned?

There’s little doubt that the number of transistors that can be loaded on an IC won’t be doubling every two years anymore. As Rudy describes in his blog, “current semiconductor fabrication processes are nearing fundamental limits, and the emergence of AI is driving demand for non-traditional computing architectures, new methods to fabricate at the nanoscale are required.”

Indeed, the radius of the hydrogen atom itself is about 0.1 nanometers, only about 100 times the dimensions being discussed in the Applied Materials & Interfaces article. There isn’t much further to go, and every step forward from now on for investigators like Rudy Wojtecki and for groundbreaking organizations like IBM will be more difficult than the last.


Featured image adapted from IBM