We have gone through the three basic gates i.e. OR gate, AND gate and NOT gate now we will look at some of the other gates. Ex-OR or Exclusive OR gate is one of them. As the name suggest it is a modified version of OR gate, but how much different it is from the fundamental gate what is the difference we will know it in this article.
The Exclusive OR gate is a two input one output gate. The symbol and the truth table are given below.
As seen from the truth table we can see that for two input Ex-OR gate the combination of total input sequence are four and if we thoroughly examine the result of the truth table we can find the obvious relation of it with the truth table of OR gate. The only difference between this truth table is that in this case the output is 0 when both the inputs are same and in all the other cases the output is 1.
The mathematical representation of the operation of the Exclusive OR gate is like.
Y = ( A ⊕ B ) = A’B + AB’ (where A’ is the complement of A and B’ is the complement of B)
From the above diagram, we can see that in the circuit of a half adder the two inputs are going through an Exclusive-OR gate and through an AND gate parallelly. And with this circuit’s operation we get the total process of binary addition smoothly.
Pseudo-random number generation
To model a linear feedback shift register Ex-OR gates are used and they generate random sequence of bits.
The Exclusive OR gate is a two input one output gate. The symbol and the truth table are given below.
| A | B | Y |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The mathematical representation of the operation of the Exclusive OR gate is like.
Y = ( A ⊕ B ) = A’B + AB’ (where A’ is the complement of A and B’ is the complement of B)
Application
Addition
The main application of the Exclusive OR gate is in the operation of half and full adder. If we look at the truth table carefully we will find that the first three results are totally satisfying the process of binary addition but in the last input sequence i.e. when both the inputs are 1 the result according to the rule of addition should be 0 with a carry 1. In the truth table we are getting the desired 0 but a missing 1. To solve this problem during designing the circuit of an adder an AND gate is added to the Ex-OR gate in parallel. We will show the circuit of the adder in detail.From the above diagram, we can see that in the circuit of a half adder the two inputs are going through an Exclusive-OR gate and through an AND gate parallelly. And with this circuit’s operation we get the total process of binary addition smoothly.
Pseudo-random number generation
To model a linear feedback shift register Ex-OR gates are used and they generate random sequence of bits.
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